The present invention relates to a semiconductor device including MONOS non-volatile memory devices and a method of manufacturing the same.
As one type of non-volatile semiconductor memory device, a MONOS (Metal Oxide Nitride Oxide Semiconductor) or SONOS (Silicon Oxide Nitride Oxide Silicon) memory device is known. In such a memory device, a gate insulating layer between a channel region and a control gate is formed of a multi-layer stack of a silicon oxide layer and a silicon nitride layer, and charge is trapped in the silicon nitride layer.
A device shown in FIG. 16 is known as an example of this MONOS type of non-volatile semiconductor memory device (disclosed by Y. Hayashi, et al, in 2000 Symposium on VLSI Technology Digest of Technical Papers, pp. 122–123).
In this MONOS memory cell 100, a word gate 14 is formed on a semiconductor substrate 10 with a first gate insulating layer 12 interposed therebetween. A first control gate 20 and a second control gate 30 in the shape of sidewalls are disposed on opposite sides of the word gate 14. A first gate insulating layer 22 is present between the bottom of the first control gate 20 and the semiconductor substrate 10. An insulating layer 24 is present between the side of the first control gate 20 and the word gate 14. A second gate insulating layer 22 is present between the bottom of the second control gate 30 and the semiconductor substrate 10. An insulating layer 24 is present between the side of the second control gate 30 and the word gate 14. Impurity layers 16 and 18 which make up either a source region or a drain region are formed in the semiconductor substrate 10 between the control gate 20 and the control gate 30 which face each other in the adjacent memory cells.
As described above, one memory cell 100 includes two MONOS memory elements, one on each side of the word gate 14. These two MONOS memory elements are controlled separately. Therefore, one memory cell 100 is capable of storing two bits of information.